Intel is reportedly preparing a major challenge to AMD’s leading X3D processors. According to a reliable leaker, the company is developing a 52-core version of its upcoming Nova Lake CPU with an unprecedented 288MB of last-level vertical cache.
The report comes from well-known leaker kopite7kimi, whose comments surfaced in response to a discussion about Intel assigning 144MB of vertical cache referred to as bLLC, or big last-level cache, to certain Nova Lake processors.
Kopite7kimi clarified that some Nova Lake models will feature two compute tiles, each equipped with 8 Performance cores and 16 Efficient cores, along with 144MB of stacked cache per tile. Combined, this brings the total to 48 cores and 288MB of vertical cache, well above AMD’s existing 128MB V-Cache in the Ryzen 9 9950X3D.
The processor will also include an additional four low-power Efficient cores located in the SoC tile, bringing the full core count to 52. This figure has also appeared in a shipping manifest.
Reports also suggest a second configuration featuring 8 Performance cores and 12 Efficient cores, though the exact amount of bLLC in that model is unclear. Intel is also expected to offer single-tile versions of each configuration, resulting in four Nova Lake CPUs that support the large vertical cache option.
The aggressive design reportedly raises concerns for motherboard makers. According to Kopite7kimi, “the power supply design of the new platform will be a challenge for motherboard manufacturers,” indicating the chips may require substantial power delivery improvements.
Intel plans to launch Nova Lake at the end of 2026, directly into competition with AMD’s next-generation Zen 6 processors, which are also scheduled for release next year. This sets up a major clash in the high-performance gaming CPU market.